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HMF25664F4VSP
FLASH-ROM MODULE 2MByte (256K x 64-Bit) ,120PIN SMM,3.3V Part No. HMF25664F4VSP
GENERAL DESCRIPTION
The HMF25664F4VSPis a high-speed flash read only memory (FROM) module containing 262,144 words organized in an x64bit configuration. The module consists of four 256K x 16 FROM mounted on a 120-pin, SMM connector FR4-printed circuit board. Commands are written to the command register using standard microprocessor write timings. Register contents serve as input to an internal state-machine, which controls the erase and programming circuitry. Write cycles also internally latch addresses and data needed for the programming and erase operations. Reading data out of the device is similar to reading from 12.0V flash or EPROM devices. Output enable (/OE) and write enable (/WE) can set the memory input and output. The host system can detect a program or erase operation is complete by observing the Ready Pin, or reading the DQ7(Data # Polling) and DQ6(Toggle) status bits. When FROM module is disable condition the module is becoming power standby mode, system designer can get low -power design. All module components may be powered from a single + 3.0V DC power supply and all inputs and outputs are LVTTLcompatible
PIN ASSIGNMENT
PIN 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 Symbol Vcc DQ16 DQ17 DQ18 DQ19 DQ20 DQ21 DQ22 DQ23 Vcc DQ24 DQ25 DQ26 DQ27 DQ28 DQ29 DQ30 DQ31 Vcc NC A0 A16 /WE1 /WE2 Vcc /OE /RESET /WE0 /RY_BY Vcc
FEATURES
w Access time : 90,100 and 120ns w High-density 2MByte design w High-reliability, low-power design w Single + 3V 0.3V power supply w Easy memory expansion w Hardware reset pin(RESET#) w FR4-PCB design w 120-Pin Designed Connector P1,P2 w Minimum 100,000 write cycle guarantee per sector w 20-year data retention at 125 oC w Flexible sector architecture w Embedded algorithms w Erase suspend / Erase resume by 60-Pin Fine Pitch
P1 PIN 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 Symbol Vcc DQ32 DQ33 DQ34 DQ35 DQ36 DQ37 DQ38 DQ39 Vcc DQ40 DQ41 DQ42 DQ43 DQ44 DQ45 DQ46 DQ47 Vcc A1 A2 A3 A4 A5 Vcc A6 A7 A8 A9 Vcc PIN 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 Symbol Vss DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 Vss DQ8 DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 Vss A10 A11 A12 A13 A14 Vss A15 A17 NC NC Vss
P2 PIN 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 Symbol Vss DQ48 DQ49 DQ50 DQ51 DQ52 DQ53 DQ54 DQ55 Vss DQ56 DQ57 DQ58 DQ59 DQ60 DQ61 DQ62 DQ63 Vss NC /BANK0 Vss /BYTE /WE3 Vss NC NC NC NC Vss
OPTIONS
w Timing 90ns access 100ns access 120ns access w Packages 120-pin SMM
MARKING
-90 -100 -120
F
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FUNCTIONAL BLOCK DIAGRAM
HMF25664F4VSP
DQ0 - DQ63 A0 - A17
64 18 A(0-17) DQ(0-15)
/WE0
/WE
/BYTE
/OE /CE
RY-BY /Reset
U2
A(0-17) DQ(16-31)
/WE1
/WE
/OE /CE RY-BY /Reset
/BYTE
U3
A(0-17) DQ(32-47)
/WE2
/WE
/OE /BYTE
/CE
RY-BY /Reset
U1
A(0-17) DQ(48-63)
/WE3
/OE
/WE
/BYTE
/OE /CE
RY-BY
/BANK0
RY_/BY /RESET /BYTE
U4
/Reset
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TRUTH TABLE
HMF25664F4VSP
DQ8-DQ15 MODE STANDBY NOT SELECTED READ WRITE or ERASE NOTE: X means don't care /OE X H L H /CE Vcc 0.3 L L L /WE X H H L /RESET Vcc 0.3 H H H DQ0-DQ7 /BYTE=V IH HIGH-Z HIGH-Z Dout Din HIGH-Z HIGH-Z Dout Din
ABSOLUTE MAXIMUM RATINGS
PARAMETER Voltage with respect to ground all other pins Voltage with respect to ground Vcc Storage Temperature SYMBOL VIN,OUT VCC TSTG RATING -0.5V to VCC+0.5V -0.5V to +4.0V -65oC to +150oC
Operating Temperature TA -55Oc to +125 oC w Stresses greater than those listed under " Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operating section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability.
RECOMMENDED DC OPERATING CONDITIONS
PARAMETER Vcc for Regulated Voltages Range Vcc for Full Voltages Range Ground SYMBOL VCC Vcc VSS MIN 3.0V 2.7V 0 0 TYP. MAX 3.6V 3.6V 0
DC AND OPERATING CHARACTERISTICS (0oC TA 70 oC ; Vcc = 5V 0.5V )
PARAMETER Input Load Current Vcc = Vcc max Output Leakage Current Output High Voltage IOH = -100uA, Vcc = Vcc min Output Low Voltage Vcc Active Current for Read(1) Vcc Active Current for Program or Erase(2,3) Vcc Standby Current(3) IOL = 4.0mA, Vcc =Vcc min /CE = VIL, /OE=VIH, /CE = VIL, /OE=VIH /CE,/RESET= VCC 0.3V VOH2 VOL ICC1 ICC2 ICC3 7 15 0.2 Vcc=Vcc max, V OUT= VSS to Vcc IOH = -2.0mA, Vcc = Vcc min IL0 VOH1 0.85VCC VCC - 0.4 0.45 12 30 5 2.5 V V mA mA mA V TEST CONDITIONS VIN=VSS to Vcc IL1 SYMBOL MIN MAX 1.0 1.0 UNITS A A
Low Vcc Lock-Out Voltage VLKO 2.3 Notes: 1. The Icc current listed is typically less than 2mA/MHz, with /OE at VIH. typical V CC is 3.0V. 2. Icc active while embedded algorithm (program or erase) is in progress 3. Maximum Icc current specifications are tested with Vcc=Vcc max
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ERASE AND PROGRAMMING PERFORMANCE
LIMITS PARAMETER MIN. Sector Erase Time Byte Programming Time Chip Programming Time TYP. 0.7 9 11 MAX. 15 300 Sec s Sec UNIT
HMF25664F4VSP
COMMENTS Excludes 00H programming prior to erasure Excludes system-level overhead Excludes system-level overhead
CAPACITANCE
PARAMETER SYMBOL CIN COUT CIN2 PARAMETER DESCRIPTION Input Capacitance Output Capacitance Control Pin Capacitance
o
TEST SETUP VIN = 0 VOUT = 0 VIN = 0
TYP. 6 8.5 7.5
MAX 7.5 12 9
UNIT pF pF pF
Notes : Test conditions TA = 25 C, f=1.0 MHz.
AC CHARACTERISTICS u Erase / Program Operations
PARAMETER SYMBOLS DESCRIPTION JEDEC tAVAV tAVWL tWLAX tDVWH tWHDX STANDARD Min tWC tAS tAH tDS tDH tOES tGHWL tELWL tWHEH tWLWH tWHWL tWHWH1 tWHWH2 tGHWL tCS tCH tWP tWPH tWHWH1 tBERS tVCS tRB tBUSY Notes : 1. Not 100% tested. Write Cycle Time Address Setup Time Address Hold Time Data Setup Time Data Hold Time Output Enable Setup Time Read Recover Time Before Write /CE Setup Time /CE Hold Time Write Pulse Width Write Pulse Width High Byte Programming Operation Block Erase Operation Vcc Setup Time Recovery time from RY/BY Program/Erase Valid to RY/BY Delay 90 0 45 45 0 0 0 0 0 45 30 9 0.7 50 0 90 Max Min 100 0 45 45 0 0 0 0 0 45 30 9 0.7 50 0 90 Max Min 120 0 50 50 0 0 0 0 0 50 30 9 0.7 50 0 90 Max ns ns ns ns ns ns ns ns ns ns ns s sec s ns ns -90 CL=100pF -100 -120 UNIT
2. See the "Erase and Programming Performance" section for more Information
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HMF25664F4VSP
3.3V
2.7k Device Under Test CL IN3064 or Equivalent
6.2k
Diodes = IN3064 or Equivalent
Note : CL = 100pF including jig capacitance
u Alternate /CE Controlled Erase/ Program Operations
CL=100pF PARAMETER SYMBOLS DESCRIPTION JEDEC tAVAV tAVEL tELAX tDVEH tEHDX STANDARD tWC tAS tAH tDS tDH tOES tGHEL tWLEL tEHWH tELEH tEHEL tGHEL tWS tWH tCP tCPH tBUSY tRB Write Cycle Time Address Setup Time Address Hold Time Data Setup Time Data Hold Time Output Enable Setup Time Read Recover Time Before Write /OE High to /WE Low /WE Hold Time /CE Pulse Width /CE Pulse Width High Program/Erase Valid RY//BY Delay Recovery Time from RY//BY Min 90 0 45 45 0 0 0 0 0 45 30 90 0 -90 Max Min 100 0 45 45 0 0 0 0 0 45 30 90 0 -100 Max -120 Min 120 0 50 50 0 0 0 0 0 50 30 90 0 Max ns ns ns ns ns ns ns ns ns ns ns ns ns UNIT
Notes: 1. Not 100% tested. 2. See the "Erase and Programming Performance" section for more Information .
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u READ OPERATIONS TIMING
HMF25664F4VSP
u RESET TIMING
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u PROGRAM OPERATIONS TIMING
HMF25664F4VSP
u CHIP/SECTOR ERASE OPERATION TIMINGS
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u DATA# POLLING TIMES(DURING EMBEDDED ALGORITHMS)
HMF25664F4VSP
u TOGGLE# BIT TIMINGS (DURING EMBEDDED ALGORITHMS)
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u SECTOR PROTECT UNPROTECT TIMEING DIAGRAM
HMF25664F4VSP
u ALTERNATE CE# CONTROLLED WRITE OPERATING TIMINGS
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PACKAGE DIMENSIONS
HMF25664F4VSP
ORDERING INFORMATION
Component Number 4EA 4EA 4EA
Part Number
Density
Org.
Package
Vcc
SPEED
HMF25664F4VSP-90 HMF25664F4VSP-100 HMF25664F4VSP-120
2MByte 2MByte 2MByte
X 64
120 Pin-SMM 120 Pin-SMM 120 Pin-SMM
3.3V 3.3V 3.3V
90ns 100ns 120ns
X 64 X 64
P : PULL UP OF ALL SIGNAL (DATA LINE, ADDRESS LINE, CONTROLL SIGNAL LINE)
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